(1) Field of the Invention
The invention relates to a method of metallization of an integrated circuit device, and more particularly, to an aluminum metallization method using high temperature and low power to avoid hillocks and voids in the manufacture of an integrated circuit device.
(2) Description of the Prior Art
In the fabrication of integrated circuit devices, metal layers make contact to lower conductive layers of the integrated circuit through vias in an insulating layer. Often, tungsten plugs fill the vias. The tungsten plugs are formed by depositing tungsten overlying the insulating layer and within the via openings. The tungsten overlying the insulating layer is removed by etchback or chemical mechanical polishing (CMP), for example. Next, an aluminum or an aluminum alloy is deposited over the tungsten plug and patterned to form the interconnection. Usually, the aluminum or aluminum alloy is part of a metal stack, including TiN/AlCu/TiN, Ti/TiN/AlCu/TiN, TiN/Ti/AlCu/TiN, and TiN/AlCu/Ti/TiN, for example.
The aluminum stack pattern is then covered with an intermetal dielectric layer. This dielectric layer often includes a spin-on layer, such as non-organic spin-on-glass, low-k hydrogen silsesquioxane (HSQ), or organic flare (fluorinated poly (arylene ethers)). A furnace curing is necessary for these spin-on layers. This will lead to increased thermal stress on the metal film, causing metal voids and hillocks. The combined thermal cycling will produce thermal expansion and contraction in cooling. Because the metal has a higher thermal expansion coefficient than the intermetal dielectric (IMD), voids and hillocks randomly form within the metal line to release the stress. Hillocks are spike-like projections that protrude from the surface of the aluminum film. They can cause shorting if they penetrate the dielectric layer between neighboring metal lines. Hillock formation and prevention is discussed in Silicon Processing for the VLSI Era, Vol. II, by Stanley Wolf, Lattice Press, Sunset Beach, Calif., c. 1990, pp. 268-273.
Various methods have been proposed to improve aluminum via filling, including hillock and void prevention. U.S. Pat. No. 5,356,836 to Chen et al and U.S. Pat No. 5,371,042 to Ong teach deposition of aluminum in stages at different temperatures. U.S. Pat. No. 5,071,791 to Inoue et al teaches heating the wafer while depositing the aluminum. U.S. Pat. No. 4,782,380 to Shankar et al, U.S. Pat. No. 5,736,458 to Teng, and U.S. Pat. No. 5,449,640 to Hunt et al disclose exposing an underlayer of titanium or titanium nitride to air to stuff the grain boundaries with oxide. None of these patents discusses the problem of hillock and void prevention in an aluminum layer over a tungsten plug.